Packaging Technology - ChiP, VIA, and Advanced Packaging Solutions

Vicor's advanced packaging technologies, including ChiP (Converter housed in Package), VIA, and other surface mount technologies, enable the highest power density and optimal thermal performance. These packaging innovations allow for efficient power delivery while reducing PCB space and improving system reliability.

Overview of Packaging Technologies

Packaging technology plays a critical role in enabling high-performance power systems. Through advanced packaging techniques, Vicor has been able to significantly increase power density while reducing the physical size of power solutions. The packaging technology also impacts thermal performance, EMI characteristics, and ease of manufacturing.

The key packaging innovations include ChiP (Converter housed in Package), VIA (Vertical Integrated Array), and advanced SMD technologies that eliminate the need for external components such as magnetics and capacitors. These packaging approaches result in more efficient power systems with reduced component counts, smaller footprints, and improved performance.

ChiP™ (Converter housed in Package) Technology

Technology Overview

ChiP technology houses the entire power converter within a surface-mount package with all components fully integrated.

Key Advantages

  • Complete Integration: Entire power converter integrated in a single package
  • No External Components: Eliminates need for external magnetics, capacitors, and other passive components
  • High Power Density: Achieves up to 50% higher power density than previous generations
  • Low Inductance: Minimized parasitic inductance for improved electrical performance
  • Thermal Performance: Optimized thermal path from die to package for efficient heat removal

Applications

ChiP technology is ideal for applications requiring:

  • Maximum power density in minimal space
  • Simple design with minimal external components
  • Fast transient response due to low parasitic inductance
  • Easy manufacturing with standard SMT assembly processes

Typical ChiP Implementations

  • DCM ChiP: Fixed-ratio converter in compact package
  • BCM ChiP: Current multiplication with galvanic isolation
  • NBM ChiP: Bidirectional power module for backup applications
  • PRM ChiP: Regulated point-of-load converter in ChiP format

VIA® (Vertical Integrated Array) Technology

Technology Overview

VIA technology arranges power components in a vertical configuration within a compact package.

Key Advantages

  • Vertical Integration: Components arranged vertically to maximize use of available space
  • High Current Capacity: Optimized for high-current applications
  • Thermal Management: Multiple thermal paths for efficient heat dissipation
  • Reduced Footprint: Minimizes PCB area while increasing power capacity
  • EMI Reduction: Optimized layout reduces electromagnetic interference

Applications

VIA technology is optimal for applications requiring:

  • High-current, medium to high-power requirements
  • Space-constrained environments
  • Good thermal performance with moderate power levels
  • Cost-effective solutions with good performance

Typical VIA Implementations

  • DCM VIA: Fixed-ratio converters for medium to high-power applications
  • BCM VIA: Current multiplication modules with galvanic isolation
  • PRM VIA: Regulated bus converters in VIA format

Comparison of Packaging Technologies

Parameter ChiP VIA Traditional SMT
Power Density Very High High Medium
Footprint Efficiency Excellent Good Standard
External Components Minimal Few Many
Thermal Performance Excellent Good Standard
Manufacturing Complexity Low Low High
EMI Performance Excellent Good Standard
Cost Efficiency High (due to component reduction) High Low (due to many components)

Advanced Package Features

Thermal Enhancement

All Vicor advanced packages incorporate thermal enhancement features:

  • Exposed Pads: Direct thermal connection to PCB for heat spreading
  • Thermal Vias: Optimized via design for heat transfer through PCB
  • Package Materials: High thermal conductivity materials for efficient heat conduction
  • Die Attachment: Advanced die attach materials for improved thermal path

EMI Mitigation

Advanced packaging technologies reduce electromagnetic interference:

  • Low Loop Inductance: Compact integrated design minimizes switching loop area
  • Shielding: Package design shields sensitive control circuits
  • Symmetrical Layout: Balanced current paths reduce common-mode EMI
  • Package GND Connection: Low-impedance ground return path

Reliability Features

Advanced packages include reliability enhancements:

  • Hermetic Sealing: Protection of sensitive components from environmental factors
  • Moisture Resistance: Specialized encapsulation materials
  • Vibration Resistance: Robust mechanical design for harsh environments
  • Thermal Cycling: Materials chosen for stability over temperature extremes

Package Selection Guidelines

When to Choose ChiP Technology

Advantages

  • Maximum power density
  • Minimal external components
  • Fastest transient response
  • Smallest PCB footprint
  • Best EMI performance

Considerations

  • Higher cost per module than VIA
  • May require custom layout tools
  • Advanced thermal management needed for very high-power applications

When to Choose VIA Technology

Advantages

  • Good power density at lower cost
  • Proven technology with long history
  • Excellent for high-current applications
  • Good thermal performance
  • Wider range of available products

Considerations

  • Requires more external components than ChiP
  • Large footprint than ChiP
  • Higher inductance than ChiP

Package Dimensions and Mounting

ChiP Package Dimensions

Common ChiP dimensions include:

  • XTM: 30.5 x 22.0 x 7.5 mm
  • ChiP: 19.0 x 13.5 x 6.5 mm
  • SMChiP: 10.0 x 7.5 x 3.5 mm

VIA Package Dimensions

Common VIA dimensions include:

  • VIA: 30.5 x 22.0 x 7.5 mm (similar to DCM modules)
  • M-VIA: 21.0 x 14.4 x 7.5 mm (medium size)
  • S-VIA: 14.4 x 14.4 x 7.5 mm (small size)

Mounting Guidelines

Proper mounting techniques are critical for optimal performance:

  • Solder Paste Volume: Use appropriate volume for reliable connections
  • Reflow Profile: Follow recommended profile for specific package
  • Thermal Pad Connection: Connect thermal pad to large copper area for heat spreading
  • Clearance: Maintain required clearances for creepage and isolation
  • Stress Relief: Minimize stress on package from board flexure

Application Examples by Package Type

ChiP Applications

  • AI processor power supplies
  • High-density server applications
  • Space-constrained systems
  • High-frequency operation

VIA Applications

  • High-current POL applications
  • Industrial power supplies
  • Automotive applications
  • Cost-sensitive designs

Hybrid Applications

  • Multi-stage power systems
  • Systems with mixed requirements
  • Migration path options

Future Packaging Trends

Emerging Technologies

Vicor continues to advance packaging technology with several emerging trends:

  • System-in-Package (SiP): Integration of multiple power functions in single package
  • Embedded Packaging: Power modules embedded within PCB substrates
  • Advanced Substrate Materials: Higher thermal conductivity materials
  • 3D Integration: Further vertical integration of components
  • Smart Packages: Integrated sensing and control within packaging

Performance Targets

Future packaging will target:

  • Double today's power density
  • Even lower parasitic inductances
  • Enhanced thermal performance
  • Closer integration with semiconductors
  • Smart capabilities within the package

Frequently Asked Questions

What is the main advantage of ChiP over traditional packages?

ChiP integrates the entire power converter in a single package with no external components needed. This results in dramatically higher power density, smaller footprint, and reduced design complexity compared to traditional packages that require external magnetics and capacitors.

How does package selection impact system cost?

While ChiP modules are generally more expensive than VIA modules individually, they can reduce overall system cost by eliminating external components, reducing PCB size, simplifying manufacturing, and improving reliability. The total cost of ownership is often lower with ChiP despite higher initial component cost.

Can I use ChiP and VIA modules together in a system?

Yes, many systems successfully combine ChiP and VIA modules. This allows you to optimize for specific requirements in different parts of the system. For example, use ChiP for high-density requirements and VIA for high-current or cost-sensitive sections.

Are there any special considerations for manufacturing ChiP modules?

ChiP modules use standard SMT assembly processes but may require specific solder paste volumes and reflow profiles. The thermal pad connection is critical for both thermal and mechanical performance. Detailed layout and manufacturing guidelines are available in the product documentation.

Related Resources

Explore Advanced Packaging Solutions

Our FAE team can help you select the optimal packaging technology for your specific application requirements. Contact us for technical support, design reviews, or custom solutions.